Projects

Past research projects involving members of the lab (reverse chronological order):

    • BM-MAP (source: Bizzcom s.r.o.): Behavioural modelling and AI application mapping on memristor arrays. PhD scholarships provided by Bizzcom s.r.o., Slovakia for behavioural modelling of memristor devices and AI applications mapping on memristor crossbar arrays.
    • EPI (source: Horizon): The European Processor Initiative (EPI) is an EU Horizon funded project that aims to design and develop energy-efficient, high-performance RISC-V processors for exascale computing, targeting applications in AI, big data, automotive, and scientific simulations. Coordinated by the Barcelona Supercomputing Center, it involves partners like ARM and STMicroelectronics, and the University of Pisa, among others. During his sabbatical at the University of Pisa in Italy, in 2024, Dr. Tenentes contributed to the areas of fault-tolerant and secure processor architectures, by developing a RAS architecture and a resilience evaluation flow of post-quantum cryptographic accelerators against Deep Learning based side-channel attacks.
    • ARTEMIS – 2021-2023 (source: NSF and ESF): The Artemis project develops secure supply chain tracking through integrated hardware and software solutions, addressing issues like device spoofing and data integrity in IoT environments. The project focuses on evaluating the traceability capabilities on different supply chain networks and, then, proposing distributed as well as embedded system architectures for securing the traceability of supply chain products and assets. From an AI perspective, it employs intelligent risk analysis, adaptive security protocols, and machine learning-driven authentication to optimize blockchain-based attestation and ensure robust traceability, particularly for applications like the food supply chain. The project involves three Academic institutions (the University of Ioannina, the University of Piraeus and the University of Thessaly) and two companies. The first company, itrack (https://www.itrack.gr), develops systems for tracking supply chain logistics. The second company, the Floridis AEVEK, is the main supplier for the cold supply chain products at the largest supermarket chains that are active in Greece, such as Carrefur, AB Vasilopoulos, Lidl, Makro, Metro, and the Olympic Catering, to name a few; the company manages a huge fleet of chiller lorries and storage units for the cold supply chain. The Project is co‐financed by the European Regional Development Fund of the European Union and Greek national funds through the Operational Program Competitiveness, Entrepreneurship and Innovation, under the call RESEARCH – CREATE – INNOVATE (project code:Τ2EDK-02836. Grant: 996,650 €.
    • VIOLIN – 2018-2022 (source: NSF and ESF): The Violin project utilizes Visible Light Communication (VLC) for high-speed indoor connectivity in high-demand settings like airports and supply chains. Its AI component focuses on intelligent systems for adaptive modulation and interference management to enhance VLC network efficiency and user experience.
    • UniServer (source: ESF): The UniServer project, an EU Horizon 2020-funded initiative (2016–2019), aimed to develop a universal micro-server architecture for energy-efficient, high-performance, and secure edge computing. Coordinated by Queen’s University Belfast, it involved partners like ARM, IBM, and the University of Ioannina, where Dr. Vasileios Tenentes contributed as an ARM Research engineer. His work focused on runtime adaptation for power-noise management in micro-servers, developing on-chip power integrity characterization paradigms (hardware and software) to enhance energy efficiency and reliability. From an AI perspective, Dr Tenentes’ integrated machine learning-based models into runtime frameworks for adaptive fault tolerance, power optimization and resilience against power noise viruses, supporting IoT and edge applications.
    • PRiME: Power-efficient, Reliable, Many-core Embedded systems (source: EPSRC): The PRiME project, a £5.6m EPSRC-funded initiative (2013–2018) led by the University of Southampton, focused on developing power-efficient and reliable many-core embedded systems. It involved four UK universities (Southampton, Imperial College London, Manchester, Newcastle) and five companies, addressing energy consumption and reliability challenges in high-performance multicore processors. Dr Vasileios Tenentes contributed to fault-tolerant design and testing methodologies. The AI scope of this project included learning-based runtime algorithms for energy optimization, an AI-based runtime for improved resilience against power DoS attacks, and cross-layer frameworks to enhance system reliability.
    • RHEA: Resilient Hardware for Energy-efficient Applications (source: EPSRC): Dr Tenentes is a member of the RHEA team that has collaborated on resilient hardware for energy-efficient applications, which has been funded by EPSRC as the Resilient-Project. The RHEA project 2014-2017, was a three-year EPSRC-funded initiative, develops resilient and testable energy-efficient digital hardware for low-power devices. Its AI scope involves creating intelligent fault models and online monitoring systems to enhance reliability and testability of power management circuits, addressing challenges like BTI aging and soft errors through adaptive methods.
      The Resilient-Project outcomes have already been cited by a numerous prestigious publications in IEEE Conferences & Transactions, and the prestigious IEEE Spectrum Magazine.Our research was validated using chips provided by ARM Ltd, which was one of our industrial patterns.
    • REIN – Thallis (source: NSF and ESF): The REIN – Thallis project focused on advancing reliable and efficient integrated circuit design, emphasizing fault-tolerant techniques and testing methodologies for nanoscale technologies. It involved multiple Greek institutions, including the University of Ioannina VCAS research group led by Dr Yiorgos Tsiatouhas. The project explored timing error tolerance, soft error mitigation, and low-power testing for System-on-Chip (SoC) applications, leveraging AI-driven optimization for enhanced circuit reliability and performance
  • Heracletus II (source: NSF and ESF)
  • Pythagoras (source: NSF and ESF)